A Physical Unclonabe Function (PUF) is a circuit which generates a set of codes according to physical random performances of hardware devices. PUFs are widely used in data security in the military and commercial applications, e.g., unmanned vehicles, cloud computing, etc. Accordingly, the codes must meet the following two requirements:
(1) The set of codes must be random chip over chip, i.e., even if an exact layout of the chip is reproduced by reverse engineering, the set of codes of the reproduced chip are different from the original chip; and
(2) The set of codes generated by one chip must be constant over time, voltage, temperature, etc.
An example of a PUF is a FET pair PUF. The FET pair PUF includes two identical NFETs to form an NFET pair. Gates of the NFETs are connected together and share a same gate voltage Vg. The NFETs also have a minimum channel width and a channel length, such that they have a maximum mismatch in doping and a threshold voltage variation. In this way, a drain current difference variation, e.g., Ids1−Ids2, of the NFETs is maximized, where Ids1 is a drain current of a first NFET and Ids2 is a drain current of the second NFET.
An operation principle of a FET pair PUF is based on a drain current difference of the FET pair due to threshold variations caused by doping mismatch. More specifically, a sign of the drain current difference determines a circuit character logic value, i.e., an output of the PUF. For example, if the sign of the drain current difference is positive, i.e., Ids1−Ids2>0, the circuit character is logic 1; whereas, if the sign of the drain current difference is negative, i.e., Ids1−Ids2<0, the circuit character is logic 0.
For real systems, a large bit number of the PUF code, e.g., 128 bits, 256 bits, etc., are required. Accordingly, a selectable PUF sensor is built using a pair identical PFETs respectively connected to the NFETs. These PFETs are used as switches, such that when the PFETs are turned on using an enable logic, drains of the NFETs are connected to respective identical load resistors. Conventionally, PUF systems include a controller, a sensor array, a sensor amplifier, and a decision maker. The controller provides the enable logic to the PFETs, and thus turns on a sensor of a sensor array by turning on the PFETs. Also, the controller provides the voltage for the NFET gates.
The load resistors convert the drain currents of the NFETs of the selected sensor to voltages, e.g., VR and VL, respectively. The sensor logic character values can also be converted based on a difference between these voltages, i.e., a differential voltage VR−VL. More specifically, if the differential voltage is negative, e.g., VR−VL<0, the sensor logic character is 1; whereas, if the differential voltage is positive, e.g., VR−VL>0, the sensor logic character is 0. Thus, the differential voltage represents a randomness of the NFET pairs in the sensor array.
The sensor amplifier is a differential amplifier with differential inputs, e.g., voltages VR and VL, and a single ended output voltage. Functions of the sensor amplifier include: (i) amplify the differential voltage of the sensor; and (ii) convert the differential input voltages to the single ended output voltage.
The decision maker includes a set of voltage comparators, which compare the sensor amplifier output voltage with preset threshold voltages, and output a logic 1 or logic 0. The output of the voltage comparators must match the logic character of the corresponding sensor. Thus, the sensor amplifier output depends on the sensor differential output voltage. However, problems arise as a result of a transfer function of a differential amplifier used in the sensor amplifier. The transfer function of the differential amplifier is defined by equation (1):Vout=G—d*Vin—d+G—c*Vcom  (1)
Where Vout is an output voltage of a differential amplifier, G_d is a differential gain, Vin_d is a differential input voltage, G_c is a common mode gain, and Vcom is a common mode input voltage. More specifically, the problems arise from large variations in the common mode input voltage. For example, the common mode input voltage can have a maximum value of 0.94V, a minimum value of 0.324V, a mean value of 0.532V, and a standard deviation of 0.126V.
However, it has been found that the sensor amplifier cannot handle large variations in the common mode input voltage because the sensor amplifier output voltage is not only determined by the differential input of VR−VL, but is also impacted by the common mode input voltage. As a result of variations in the common mode input voltage, the decision maker outputs a wrong digital status, i.e., the decision maker output does not match the character value of the sensor.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.